The invention relates to a data terminal comprising a demodulator for a FSK phase-coherent modulated signal having at least two frequencies, which demodulator comprises at least a PLL circuit formed by a phase detector, a filter and a controllable oscillator as well as a logic circuit controllable by a sequencer for extracting digital data from said signal.
The invention specifically relates to a demodulator suitable for use in such a data terminal.
A demodulator suitable for such a data terminal is known from U.S. Pat. No. 4,694,257 and from "Motorola Semiconductor Technical Data. Advanced Information MC 68194 Carrierband Modem (CBM)", Motorola, 12 February 1986.
A signal according to IEEE Standard 802.4 for the Token Passing Bus method is a FSK (frequency shift keying) phase-coherent modulated sine wave signal in which a "one" is represented by one full cycle per bit period and a "zero" is represented by two full cycles per bit period, while furthermore a non-data symbol is defined which consists of half a "zero" symbol followed by a full "one" symbol terminated by half a "zero" symbol.
With this signal it is possible to transfer data represented by a specific series of "zeros" and "ones". A message is limited by so-called delimiters which contain the non-data symbol "N". In addition to digital data a FSK phase-coherent modulated signal comprises a clock signal which is related to the bit rate. In a demodulator for such a signal the clock signal is recovered from the modulated signal and the data are extracted from that modulated signal.